1. Field of the Invention
The present invention relates generally to wireless communications and, in particular, to a method and apparatus for encrypting data based on the Advanced Encryption Standard (AES) block algorithm for processing multiple AES modes in a single hardware module.
2. Description of the Related Art
With the continuous increase of data traffic over the Internet and mobile communication networks, personal information security has become increasingly important. The Data Encryption Standard (DES) is a conventional encryption standard using 56-bit key, and has become vulnerable to sophisticated hacking attacks. Accordingly, the Advanced Encryption Standard (AES), which includes three block ciphers, AES-128, AES-192, and AES-256 having 128-bit block size with key sizes of 128, 192, and 256 bits, respectively, has been introduced.
The AES block algorithm has been adopted for the data encryption in mobile communication standards such as Long Term Evolution (LTE) and WiMax. Particularly, the AES block algorithm has several modes of operation including AES_CMAC (AES Cipher Based Message Authentication), AES_CTR (AES in CounTeR), and AES_CCM (AES Counter with Cipher block Change Message authentication) modes for encrypting/decrypting data. In order to encrypt and decrypt data with the AES block algorithm, the base station of the mobile communication system includes an AES engine.
The AES engine is provided with the hardware modules corresponding to the respective AES_CMAC, AES_CTR, and AES_CCM modes, which causes a lack of hardware usage flexibility. Also, the conventional AES block algorithm is implemented with hardware modules responsible for the respective processes and thus not programmable even though these processes can be performed in software. Accordingly, there is a need in the art to modify the hardware security module to have more flexibility for much higher security performance and develop a hardware module for improved AES block algorithm.